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 IPD50R399CP
CoolMOSTM Power Transistor
Features * Lowest figure of merit RON x Qg * Ultra low gate charge * Extreme dv/dt rated * High peak current capability * Pb-free lead plating; RoHS compliant * Quailfied according to JEDEC1) for target applications
Product Summary VDS @Tjmax RDS(on),max Qg,typ 550 0.399 17 V nC
PG-TO252
CoolMOS CP is designed for: * Hard and softswitching SMPS topologies * DCM PFC for Lamp Ballast * PWM for Lamp Ballast & PDP and LCD TV Type IPD50R399CP Package PG-TO252 Marking 5R399P
Maximum ratings, at T j=25 C, unless otherwise specified Parameter Continuous drain current Symbol Conditions ID T C=25 C T C=100 C Pulsed drain current2) Avalanche energy, single pulse Avalanche energy, repetitive t AR2),3) Avalanche current, repetitive t AR2),3) MOSFET dv /dt ruggedness Gate source voltage I D,pulse E AS E AR I AR dv /dt V GS V DS=0...400 V static AC (f>1 Hz) Power dissipation Operating and storage temperature P tot T j, T stg T C=25 C T C=25 C I D=3.3 A, V DD=50 V I D=3.3 A, V DD=50 V Value 9 6 20 215 0.33 3.3 50 20 30 83 -55 ... 150 W C A V/ns V mJ Unit A
Rev. 2.0
page 1
2007-11-21
IPD50R399CP
Maximum ratings, at T j=25 C, unless otherwise specified Parameter Continuous diode forward current Diode pulse current2) Reverse diode dv /dt 4) Symbol Conditions IS I S,pulse dv /dt T C=25 C Value 4.9 20 15 V/ns Unit A
Parameter
Symbol Conditions min.
Values typ. max.
Unit
Thermal characteristics Thermal resistance, junction - case Thermal resistance, junction ambient Soldering temperature, reflowsoldering R thJC R thJA T sold leaded 1.6 mm (0.063 in.) from case for 10 s 1.5 62 260 C K/W
Electrical characteristics, at T j=25 C, unless otherwise specified Static characteristics Drain-source breakdown voltage Gate threshold voltage V (BR)DSS V GS=0 V I D=250 A V, V GS(th) V DS=V GS, I D=0.33 mA V DS=500 V, V GS=0 V, T j=25 C V DS=500 V, V GS=0 V, T j=150 C Gate-source leakage current Drain-source on-state resistance I GSS R DS(on) V GS=20 V, V DS=0 V V GS=10 V, I D=4.9 A, T j=25 C V GS=10 V, I D=4.9 A, T j=150 C Gate resistance RG f =1 MHz, open drain 500 2.5 3 3.5 V
Zero gate voltage drain current
I DSS
-
-
1
A
-
10 0.36
100 0.399 nA
-
0.90 2.2
Rev. 2.0
page 2
2007-11-21
IPD50R399CP
Parameter Symbol Conditions min. Dynamic characteristics Input capacitance Output capacitance C iss C oss V GS=0 V, V DS=100 V, f =1 MHz V GS=0 V, V DS=0 V to 400 V V DD=400 V, V GS=10 V, I D=4.9 A, R G=35.1 81 35 14 80 14 ns 890 40 38 pF Values typ. max. Unit
Effective output capacitance, energy C o(er) related6) Effective output capacitance, time related7) Turn-on delay time Rise time Turn-off delay time Fall time Gate Charge Characteristics Gate to source charge Gate to drain charge Gate charge total Gate plateau voltage Reverse Diode Diode forward voltage Reverse recovery time Reverse recovery charge Peak reverse recovery current
1) 2)
C o(tr) t d(on) tr t d(off) tf
Q gs Q gd Qg V plateau V DD=400 V I D=4 9 A V, =4.9 A, V GS=0 to 10 V
-
4 6 17 5.2
23 -
nC
V
V SD t rr Q rr I rrm
V GS=0 V, I F=4.9 A, T j=25 C
-
0.9 260 1.9 12.2
1.2 -
V ns C A
V R=400 V, I F=I S, di F/dt =100 A/s
-
J-STD20 and JESD22 Pulse width t p limited by T j,max Repetitive avalanche causes additional power losses that can be calculated as P AV=E AR*f. I SDI D, di /dt 400A/s, V DClink=400V, V peak3) 4) 5)
Device on 40mm*40mm*1.5mm epoxy PCB FR4 with 6cm2 (one layer, 70mm thick) copper area for drain connection. PCB without blown air.
6) 7)
C o(er) is a fixed capacitance that gives the same stored energy as C oss while V DS is rising from 0 to 80% V DSS. C o(tr) is a fixed capacitance that gives the same charging time as C oss while V DS is rising from 0 to 80% V DSS.
Rev. 2.0
page 3
2007-11-21
IPD50R399CP
1 Power dissipation P tot=f(T C) 2 Safe operating area I D=f(V DS); T C=25 C; D =0 parameter: t p
160 102
140
limited by on-state resistance
1 s 10 s 100 s
120 101 100
1 ms 10 ms
Ptot [W]
80
ID [A]
DC
60 100 40
20
0 0 25 50 75 100 125 150 175
10-1 100 101 102 103
TC [C]
VDS [V]
3 Max. transient thermal impedance Z(thJC)=f(tp); parameter: D=t p/T
101
4 Typ. output characteristics I D=f(V DS); T j=25 C parameter: V GS
60
20 V 10 V
50
8V 7V 0.5
100
40
ZthJC [K/W]
ID [A]
0.2 0.1 0.05
30
6V
10-1
0.02 0.01 single pulse
20
5.5 V
10
5V 4.5 V
10-2 10-5 10-4 10-3 10-2 10-1 100
0 0 5 10 15 20
tp [s]
VDS [V]
Rev. 2.0
page 4
2007-11-21
IPD50R399CP
5 Typ. output characteristics I D=f(V DS); T j=150 C parameter: V GS
40
20 V 10 V
6 Typ. drain-source on-state resistance R DS(on)=f(I D); T j=150 C parameter: V GS
1
5.5 V 6V 6.5 V
0.9
30
7V
8V 6V
0.8
0.7
10 V 7V
RDS(on) []
ID [A]
20
5.5 V
0.6
0.5
5V
10
4.5 V
0.4
0.3
0 0 5 10 15 20 25
0.2 0 5 10 15 20 25 30 35
VDS [V]
ID [A]
7 Drain-source on-state resistance R DS(on)=f(T j); I D=4.9 A; V GS=10 V
8 Typ. transfer characteristics I D=f(V GS); |V DS|>2|I D|R DS(on)max parameter: T j
0.6
30
25 C
0.5
25
0.4
98 % typ
20
RDS(on) []
0.3
ID [A]
150 C
15
0.2
10
0.1
5
0 -60 -20 20 60 100 140 180
0 0 2 4 6 8 10
Tj [C]
VGS [V]
Rev. 2.0
page 5
2007-11-21
IPD50R399CP
9 Typ. gate charge V GS=f(Q gate); I D=4.9 A pulsed parameter: V DD
10
10 Forward characteristics of reverse diode I F=f(V SD) parameter: T j
102
25 C, 98%
8
100 V 400 V 150 C, 98%
101 6
150 C
25 C
VGS [V]
4 100
2
IF [A]
10-1 0 0 5 10 15 20 0 0.5 1 1.5 2
Qgate [nC]
VSD [V]
11 Avalanche energy E AS=f(T j); I D=3.3 A; V DD=50 V
12 Drain-source breakdown voltage V BR(DSS)=f(T j); I D=0.25 mA
450 400 350
580
560
540 300
VBR(DSS) [V]
EAS [mJ]
250 200 150
520
500
480 100 460 50 0 25 75 125 175 440 -60 -20 20 60 100 140 180
Tj [C]
Tj [C]
Rev. 2.0
page 6
2007-11-21
IPD50R399CP
13 Typ. capacitances C =f(V DS); V GS=0 V; f =1 MHz 14 Typ. Coss stored energy E oss= f(V DS)
104
5
Ciss
4 103
102
Eoss [J]
2 1 0
Coss
3
C [pF]
101
Crss
100 0 100 200 300 400 500
0
100
200
300
400
500
VDS [V]
VDS [V]
Rev. 2.0
page 7
2007-11-21
IPD50R399CP
Definition of diode switching characteristics
Rev. 2.0
page 8
2007-11-21
IPD50R399CP
PG-TO252-3-1/PG-TO252-3-11/PG-TO252-3-21: Outline
Rev. 2.0
page 9
2007-11-21
IPD50R399CP
Published by Infineon Technologies AG 81726 Munich, Germany (c) 2007 Infineon Technologies AG All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office
(www.infineon.com).
Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.
Rev. 2.0
page 10
2007-11-21


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